Projects

ATM
Traffic on high bandwidth ATM (Asynchronous Transfer Mode) networks is being measured using the University of Waikato's ATM network and video servers. Special hardware is being constructed so that these measurements can be done without interfering with the actual traffic. The traffic is being modelled and a simulator to execute these models is being developed. The simulator is aimed at being able to simulate 106 ATM cells per second on a single processor and to be further accelerated using parallel execution techniques. This work is being supported by a $28,000 grant from Telecom New Zealand and is being done in conjunction with the Canadian Telesim Project.

Time Warp
Time Warp is a technique to accelerate simulations on multiple processors. Work is being done on a high performance implementation of Timewarp on a shared memory processor. This work is focussed on load balancing, algorithms for computing GVT and incremental state saving. This work is being done in conjunction with the Canadian Telesim project and receives $120,000 a year in funding from the New Zealand Public Good Science Fund.

WarpEngine
This is a design for a highly parallel CPU which can execute sequential "dusty deck" code in parallel without programmer intervention. It is based around key ideas taken from the TimeWarp algorithm which it uses to timestamp all reads and writes to memory. Work is under way on defining algorithms and protocols for the system, evaluating the performance of the system, and doing hardware designs of key components. This project is being supported by a $50,000 Marsden grant.

As well other work is going on on page level distributed file systems, hardware description languages and parallelising logic programs.

Research in this laboratory is supported by an ATM network, an eight processor SparcCenter 1000 and access to large multi-processor systems overseas.