Richard's Assembler for the WarpEngine Simulator

For use with version two of the instruction set.

Last modified: Fri Oct 29 14:45:10 NZDT 1999

Disclaimer

This specification is for the assembler/translation that I have created so that I could compile and run some code fragments on the WarpEngine Simulator. It is by no means a complete assembler - it does the job for me. I am open to any suggestions on improvements that can/should be made to it (although there is no guarantee that they will put in place). Since there was/is no formal specification for a WarpEngine assembler all choices as to style and keyword selection are arbitrary and based on what I felt was good at the time.

In the following tables <x> means x is required, [x] means x is optional.

Symbols

The following table shows character combinations that are special:

Symbol Name Description

&& Block Seperator Used to denote the end of a block and also to seperate the various sections.

$<string> Constant Defines a constant that can be used to replace an integer/float/char value through out the program code.

@<string> Memory Location Defines a constant that can be used to replace a memory address through out the program code.

&<string> Block Name Defines the start of a block and is used through out the file to reference that block.

#<string> Import Name Used to denote the import varibales in a block.

<digit>: Label Defines a label within a block.

%<text><eol> Comment All text following the % upto the end of the line is considered to be a comment and is ignored by the assembler.

^<0-3> Child Number Determines child number for use with the CHILD instruction. Maximum of 4 children per block

Symbol	Name	Description
&&	Block Seperator	Used to denote the end of a block and also to seperate the various sections.
$<string>	Constant	Defines a constant that can be used to replace an integer/float/char value through out the program code.
@<string>	Memory Location	Defines a constant that can be used to replace a memory address through out the program code.
&<string>	Block Name	Defines the start of a block and is used through out the file to reference that block.
#<string>	Import Name	Used to denote the import varibales in a block.
<digit>:	Label	Defines a label within a block.
%<text><eol>	Comment	All text following the % upto the end of the line is considered to be a comment and is ignored by the assembler.
^<0-3>	Child Number	Determines child number for use with the CHILD instruction. Maximum of 4 children per block

Keywords

All WarpEngine instructions are given in capital letters. (NOTE: They can now be given in either upper or lower case - with any combination of each.) The second version of the instruction set with the definitions of the instructions can be found here. The following table gives all the instruction keywords and their inputs and out puts. "?" gives the conditional version of the instruction (for those instructions that can be conditional) otherwise the unconditional version is used. "[]"'s indicate that the enclosed parameter is optional.

Instruction	Inputs	Outputs	Comment
CHILD ?CHILD	A1 A2 CN MI	DS	DS is automatically generated & migration hint information is ignored in the simulator
TRAP ?TRAP	V1 V2 C1	-	-
ST ?ST	V1 A2 C1	-	-
MV ?MV	V1 CR2	IN	-
MA ?MA	A1 CR2 C1	IN	Format used in code is A2 CR2 IN C1
CMP	V1 V2	COP1 D1 [D2] [COP2 D3]	-
ADD SUB MUL DIV	V1 V2	D1 [D2 [D3]] ['\|' D4] or [D1 [D2 [D3]]] '\|' D4	There must be at least 1 destination.
SPLIT	V1 V2	R1 J1 D1 [R2 J2 D2 [R3 J3 D3]]	-
I2F	V1 V2	D1 [D2] ['\|' D3 [D4]] or [D1 [D2]] '\|' D3 [D4]	There must be at least 1 destination.
ADDF SUBF MULF DIVF F2I	F1 F2	D1 [D2 [D3 [D4]]]	-
AND OR XOR	V1 V2	D1 [D2 [D3 [D4]]]	-

Abbreviations:

CN - Child Number
MI - Migration Treatment
DS - DestinationS
Vx - Variable x
Cx - Constant x
Ax - Address x
CRx - Child Reference x
IN - Import Name
COPx - Compare OPerator x
Dx - Destination x
Fx - Floating point value x
Ri - Referenced bits
Ji - Justification direction

Assembler File Format

A Warp Assembly file has two parts, a data/constant section and an instruction section. The data section comes first followed by the instruction section. They are seperated by the block termination symbol "&&". Having the sections in this order means that only one pass is required by the assembler. (This is another area where constraints sould be freed up - ie. allow more sections to occur in any order.)

Data Section

The data section consists of data and location information. Each line contains one definintion and the definitions are formated like this:

Global constants
```
$x	5
      
```
will set the constant $x to be equal to 5. The assemebler will replace all further occurences of $x with the 5.
Address locations
```
@addr	LOC	1000
```
will set the address constant @addr to be the location 1000. The assembler will replace all further occurences of @addr with 1000 (or 1000>>2 if its referenced in the constant address part of the MA instruction).
Load data
```
@addr	DAT	10, 'c', 12.34, 0xabc
```
the assembler will place the values 10, 'c', 12.34 and 0xabc at @addr, @addr+4, @addr+8 and @addr+12. @addr must be set to some location within the data section. This may occur before or after this data loading declaration.

Instruction Section

The instruction section consists of a series of blocks which represent the program code. Each block has the following format:

Format	Example
Block Name '(' Import List ')'	&foo(#bob,#jim)
Instructions	ADD #bob 1 bob1 % bob+1 MUL #jum 28 jim1 % jim28 DIV jim1 bob1 jb % (jim28)/(bob+1) 0:CHILD &bar 0 ^0 0 % fire block 'bar' with no hints MV jb 0: #x % move (jim*28)/(bob+1) to 'bar' child
Block Terminator	&&

Format

Example

Block Name '(' Import List ')'

&foo(#bob,#jim)

Instructions

ADD     #bob  1     bob1   % bob+1
MUL     #jum  28    jim1   % jim*28
DIV     jim1  bob1  jb     % (jim*28)/(bob+1)
0:CHILD &bar  0     ^0 0   % fire block 'bar' with no hints
MV      jb    0:    #x     % move (jim*28)/(bob+1) to 'bar' child

Block Terminator

&&

Blocks are seperated by 0 or more blank lines (a line with only a comment on it is considered to be a blank line). All the instructions between the block header and the block terminator are considered to belong to that block. There can be between 0 and 16 instructions within a block. Blank lines within a block are ignored.

In the above table the '0:' label was used with the CHILD instruction so that the ds field (part of the f-field of the child instruction) can be built automaticly by the assemebler. All instructions in the block which have the '0:' label as an input (in this case the MV) will set a bit in the ds field indicating that address of the frame should be sent to that instruction when it is known (by the hardware at run time). The assembler has to generate the ds field as it suffles the instructions within a block - ie. it's out of the programmers control.

This labelling is also used to allow the s-register of conditional instructions to be set. This is done when the reference to the label is in the output of an instruction. eg. in the code fragment

...
CMP       x     y    < 3:
3:?CHILD  &foo  0    ^0 0
...

the conditional child &foo is only fired if the value x is < the value y.

The block &start() is designated to be the start of the program. It has no parameters. If &start() does not exist then first block in the file is considered to be the start block.

The SPECIAL Instruction

Since there is only a simulator for the WarpEngine, and I have control over its evolution, it has the ability to perform an extra instruction. This instruction, SPECIAL, performs different tasks depending on its inputs and has been included so that some complex functionality can be ignored. It has the format,

Instruction	Inputs	Outputs
SPECIAL	FUN VAL	D1 [D2 [D3 [D4]]]

with FUN being the function to perform on the value VAL. The functions are:

Number	Function
0	rand()%VAL
1	printint(VAL) to stdout
2	printchar(VAL) to stdout
3	printfloat(VAL) to stdout

Other functions may be added at any time!

Example Code

Sample code can be found here here.

Send any questions or suggestions about this page to rhl@cs.waikato.ac.nz.