Space Constraints on High Levels of ILP

$\begin{figure} \hrulefill \\ \begin{bf}\begin{small} Proceedings of the Four... ...ecific prior permission from Springer-Verlag. \end{small}\end{bf} \end{figure}$

Department of Computer Science,
University of Waikato,
Hamilton, New Zealand
{jcleary, rhl, jadm, mpearson}@cs.waikato.ac.nz

Abstract:

ILP is one way of effectively using the large number of transistors available on modern CPUs. Two different architectures which use speculation on memory accesses to do this are reviewed. While this form of speculation gives high potential parallelism, it is necessary to retain execution state so that the incorrect speculation can be detected and subsequently squashed. It is shown by theoretical arguments and simulation that the space to store such state is a critical resource in obtaining good speedup. The state must be stored efficiently and retired as soon as possible. It is also shown that larger problem sizes may achieve lower extracted parallelism, despite having a higher potential parallelism.