To examine the performance properties of each of the reordering types we define a set of abstract machine models and analyze the potential parallelism that is available for each machine. The machines are formed by taking combinations of the memory ordering relaxation types. They each assume infinite resources and unlimited memory bandwidth. The abstract machines we have used in our experiments are summarized in Table 1.
Machine Description NONE All memory accesses happen in their virtual order. RPR Reads can pass reads. RPR-WPW Reads can pass reads and writes can pass writes. RPR-WPR Reads and writes can pass reads. RPR-WPR-WPW Reads and writes can pass reads
and writes can also pass writes. RPR-RPW Reads can pass reads and writes. RPR-RPW-WPW Reads can pass reads and writes, and writes can pass writes. RPR-RPW-WPR Reads can pass reads and writes, and writes can pass reads. ALL Memory accesses can happen in any order.
At the extremes there are two machines, one with all ordering constraints in place and the other with all ordering constraints relaxed. The totally constrained machine is included to give a base line. The fully relaxed machine is only constrained by the true data dependencies of the program and closely approximates the data disambiguation capabilities of an Oracle machine [LW92]. Current (1997) architectures are approximated by the RPR-WPR machine with a limited sized instruction window.